In the semiconductor industry, such as the memory chip industry, there is a constant drive to manufacture smaller structures to gain a higher integration on the memory chips.
One approach to achieve this is the use of shorter wavelengths (e.g., EUV lithography) to produce smaller structures. Another approach tries to reduce the structure size by immersion lithography by interposing a liquid medium between the optics and a surface of a substrate, such as a silicon wafer, replacing the usual air gap. This liquid has a refractive index greater than one. The wavelength in the liquid is reduced by a factor equal to the refractive index.
All this requires considerable development costs. Therefore, an incentive exists to produce structures and lithography methods which allow the usage of current technology while reducing the size of the manufactured structures.
To use the potential of the existing illumination sources (e.g., lithography with wavelengths of 193 nm or 248 nm), the manufacturing of fine sublithographic structures, especially fine regular line structures, using spacer techniques, has been described, e.g., in the DE 42 35 702 A1 and DE 42 36 609 A1. In DE 42 36 609 A1 a line-by-spacer method is described to produce sublithographic spacers. In US20060024621A1 and DE102004034572A1 a line-by-spacer-fill and a line-by-liner-fill method are described. Line shrink methods are described in the article in Microelectronic Engineering 83, pages 730 to 733. Embodiments of the current invention provide a structure which can be manufactured using the existing lithography tools.